STMicroelectronics STA9200MA Teseo APP2 GNSS Receiver IC

STMicroelectronics STA9200MA Teseo APP2 GNSS Receiver Integrated Circuit (IC) supports multi-constellations up to quad-band with a single-die approach. This multiband multi-constellation receiver IC requires only a few external components because it embeds enough MIPS/memory resources to support multiband measurement up to quad-band. The STA9200MA measurement engine operates dual cores in lockstep, providing hardware redundancy for applications such as road vehicle guidance that meets ISO 26262 ASIL-B functional safety. Pin-compatibility between the Teseo APP2 module and Teseo VI ICs simplifies PCB designs for companies generating ASIL-certified and non-ASIL applications. The device supports a unique PCB design for safety and non-safety applications and offers excellent flexibility, handling software configurations with a binary firmware component. STMicroelectronics STA9200MA Teseo APP2 GNSS Receiver IC is designed per ISO 26262 automotive safety standards and features a QFN package with wettable flanks.

Features

AEC-Q100 automotive qualified
Arm® Cortex®-M7 (lockstep support)
Embedded RAM/NVM/cache
Dedicated ADC for antenna sensing
ESD: 2kV (HBM) and 500V (CDM)
Automotive grade +105°C
GNSS
- STMicroelectronics' 6th Gen positioning receiver with 6 constellations: GPS, Galileo, GLONASS, BeiDou, QZSS, and NAVIC (former IRNSS)
- Standard PVT positioning supporting up to quad-band for submeter accuracy applications
- Measurement engine to support precise positioning algorithms
- Code phase, carrier phase, doppler frequency measurement, and related quality metrics
- Support any SBAS systems
- 192 (96 data and 96 pilot) signal-tracking channels
Safety
- Comprehensive ISO 26262 safety concept
- Fault collection and control unit (FCCU) with up to 2 error outputs
- ECC/CRC
- Safe communication protocol with host
- RF and core hardware monitors
Core peripherals
- Embedded DMA
- 32kHz oscillator real-time clock
- Watchdog timer
- Extended function timer

Security
- Cybersecurity (ISO 21434) support
- Chip integrity (secure boot, secure firmware update, and secure link) thanks to embedded hardware security module (HSM)
- Signal integrity (anti-jamming/anti-spoofing)
- Interface integrity (on-the-fly decryptor engine)
Communication interfaces
- 2x UART ports for host communication supporting hardware flow control
- Synchronous serial port (SSP) for host communication
- I²C port for sensor interfacing
- SPIQ port for sensor interfacing
- PPS configurable output
Power management unit
- Separate power supply domains
  - 1.71V to 3.63V backup domain
  - 1.71V to 3.63V switchable domain
  - 0.9V to 1V optional external core supply voltage
- On-chip LDOs with high-voltage/low-voltage monitors
VFQFPN56 package with wettable flanks
7mm x 7mm x 0.9mm dimensions