Texas Instruments TDA4VH/AH-Q1 & TDA4VP/AP-Q1 Jacinto™ Processors
Texas Instruments TDA4VH-Q1, TDA4AH-Q1, TDA4VP-Q1, and TDA4AP-Q1 Jacinto™ Processors are automotive driver-assist SoCs for vision perception, analytics, sensor fusion, and advanced compute applications. The series combines Arm® Cortex®-A72 cores, Arm Cortex-R5F MCUs, C7x DSP resources, deep-learning matrix multiply acceleration, vision processing, depth and motion processing, and GPU options for scalable automotive processing designs.
The TDA4VH-Q1 and TDA4AH-Q1 variants support up to 32TOPS of AI performance, while the TDA4VP-Q1 and TDA4AP-Q1 variants support up to 24TOPS for vision perception and analytics. The TI TDA4VH/AH-Q1 and TDA4VP/AP-Q1 Jacinto Processors also include high-speed connectivity, LPDDR4 memory support, functional safety capabilities, device security, camera interfaces, PCIe, USB, and integrated Ethernet switching for complex automotive systems.
The processors are ideal for automotive driver-assist systems, high-performance computing, multicamera processing, sensor fusion, and ADAS domain-control applications. The TDA4VH/AH-Q1 and TDA4VP/AP-Q1 devices are AEC-Q100 qualified on the Q1 variants and are available in FCBGA packages, supporting -40°C to +125°C operating temperatures.
Features
- TDA4VH/AH-Q1 and TDA4VP/AP-Q1 AEC-Q100 qualified on Q1 part number variants
- Functional Safety-Compliant support on select part numbers
- Documentation available to aid ISO 26262 and IEC 61508 functional safety system designs up to ASIL D and SIL 3
- ISO 26262 and IEC 61508 certification up to ASIL D and SIL 3 by TÜV SÜD
- Scalable AI and vision processing
- TDA4VH-Q1 and TDA4AH-Q1 support up to 32TOPS of AI performance
- TDA4VP-Q1 and TDA4AP-Q1 support up to 24TOPS of AI performance
- Processor resources
- Up to four C7x floating-point vector DSPs
- Up to four deep-learning matrix multiply accelerators
- Eight Arm Cortex-A72 microprocessor subsystem
- Eight Arm Cortex-R5F MCUs
- Vision, imaging, and analytics acceleration with VPAC, ISP, DMPAC, video encode, and video decode resources
- Device security on select part numbers
- Secure boot with secure run-time support
- Customer-programmable root key up to RSA-4K or ECC-512
- Embedded hardware security module
- Crypto hardware accelerators with PKA, ECC, AES, SHA, RNG, DES, and 3DES support
- High-speed interface support for Ethernet, PCIe, USB 3.0, and MIPI CSI-2 camera connectivity
- Supported operating systems include AutoSAR, FreeRTOS, INTEGRITY, Linux, QNX, SafeRTOS, VxWorks, and u-velOSity
Applications
- Vision perception and analytics
- Automotive driver assist SoCs
- ADAS/AD automotive camera
- Front camera
- Mirror replacement and camera mirror
- 3D surround view
- ADAS domain controller
- Cluster, IVI, and displays
- Driver monitoring and occupant monitoring
Specifications
- Memory subsystem
- Up to 8MB of on-chip L3 RAM with ECC and coherency
- Up to four External Memory Interface modules with ECC and LPDDR4 support
- LPDDR4 speeds up to 4266MT/s
- Up to 4x32-b bus with inline ECC up to 68GB/s
- 3x512KB on-chip SRAM in MAIN domain with ECC protection
- Ethernet switch support
- Up to 8 external ports for TDA4xH devices
- Up to 4 external ports for TDA4xP devices
- Two ports with 5Gb and 10Gb USXGMII/XFI support
- PCIe Gen3 controller support
- Up to 4x2-L or 2x4L for TDA4xH devices
- Up to 2x2L or 1x4L for TDA4xP devices
- USB 3.0 dual-role device subsystem with Enhanced SuperSpeed Gen1 port and Type-C switching support
- Camera interface support
- Three CSI2.0 4L Camera Serial Interface RX ports
- Two CSI2.0 4L TX ports
- MIPI CSI 1.3 and MIPI-DPHY 1.2 compliance
- Package and temperature
- TDA4VH-Q1 FCBGA package with 1414 pins
- Operating temperature range of -40°C to +125°C
Additional Resources
- J784S4, TDA4AP, TDA4VP, TDA4AH, TDA4VH, AM69A Processors Silicon Revision
- J784S4 J742S2 Technical Reference Manual (Rev. E)
- SPL Boot Time Optimizations on Jacinto SoCs
- Recovery of Main Domain on Heterogeneous SOC
- TIDLRunner: Simplifying the 'Bring Your Own Model' Development Flow for Edge AI Accelerated Processors
- Securing the Future: Cyber Resilience Act (EU-CRA) Compliance with TI’s Jacinto and Sitara Processors
Functional Block Diagram
